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550W, a high-end OS
csr.h
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2015 Regents of the University of California
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*/
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#pragma once
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/* Status register flags */
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#define SR_SIE 0x00000002
/* Supervisor Interrupt Enable */
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#define SR_SPIE 0x00000020
/* Previous Supervisor IE */
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#define SR_SPP 0x00000100
/* Previously Supervisor */
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#define SR_SUM 0x00040000
/* Supervisor User Memory Access */
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#define SR_FS 0x00006000
/* Floating-point Status */
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#define SR_FS_OFF 0x00000000
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#define SR_FS_INITIAL 0x00002000
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#define SR_FS_CLEAN 0x00004000
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#define SR_FS_DIRTY 0x00006000
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#define SR_XS 0x00018000
/* Extension Status */
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#define SR_XS_OFF 0x00000000
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#define SR_XS_INITIAL 0x00008000
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#define SR_XS_CLEAN 0x00010000
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#define SR_XS_DIRTY 0x00018000
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#define SR_SD 0x8000000000000000
/* FS/XS dirty */
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/* SATP flags */
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#define SATP_PPN 0x00000FFFFFFFFFFF
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#define SATP_MODE_39 0x8000000000000000
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#define SATP_MODE SATP_MODE_39
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/* SCAUSE */
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#define SCAUSE_IRQ_FLAG ((uint64_t)1 << 63)
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#define IRQ_U_SOFT 0
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#define IRQ_S_SOFT 1
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#define IRQ_M_SOFT 3
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#define IRQ_U_TIMER 4
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#define IRQ_S_TIMER 5
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#define IRQ_M_TIMER 7
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#define IRQ_U_EXT 8
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#define IRQ_S_EXT 9
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#define IRQ_M_EXT 11
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#define EXC_INST_MISALIGNED 0
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#define EXC_INST_ACCESS 1
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#define EXC_BREAKPOINT 3
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#define EXC_LOAD_ACCESS 5
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#define EXC_STORE_ACCESS 7
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#define EXC_SYSCALL 8
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#define EXC_INST_PAGE_FAULT 12
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#define EXC_LOAD_PAGE_FAULT 13
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#define EXC_STORE_PAGE_FAULT 15
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/* SIE (Interrupt Enable) and SIP (Interrupt Pending) flags */
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#define SIE_SSIE (0x1 << IRQ_S_SOFT)
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#define SIE_STIE (0x1 << IRQ_S_TIMER)
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#define SIE_SEIE (0x1 << IRQ_S_EXT)
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#define SSTATUS_UIE (1 << 0)
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#define SSTATUS_SIE (1 << 1)
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#define SSTATUS_UPIE (1 << 4)
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#define SSTATUS_SPIE (1 << 5)
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#define SSTATUS_SPP (1 << 8)
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#define SSTATUS_FS (3 << 13)
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#define SSTATUS_XS (3 << 15)
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#define SSTATUS_SUM (1 << 18)
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#define SSTATUS_MXR (1 << 19)
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#define SSTATUS_UXL (3 << 34)
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#define SSTATUS_SD (1 << 63)
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#define CSR_CYCLE 0xc00
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#define CSR_TIME 0xc01
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#define CSR_INSTRET 0xc02
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#define CSR_SSTATUS 0x100
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#define CSR_SIE 0x104
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#define CSR_STVEC 0x105
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#define CSR_SCOUNTEREN 0x106
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#define CSR_SSCRATCH 0x140
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#define CSR_SEPC 0x141
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#define CSR_SCAUSE 0x142
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#define CSR_STVAL 0x143
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#define CSR_SIP 0x144
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#define CSR_SATP 0x180
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#define CSR_CYCLEH 0xc80
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#define CSR_TIMEH 0xc81
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#define CSR_INSTRETH 0xc82
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#define CSR_MHARTID 0xf14
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#define BOOT_STACK_MASTER 0x80600000
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#define BOOT_STACK_SLAVE 0x805ff000
src
arch
riscv
include
asm
csr.h
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