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kendryte-k210.dtsi 3.41 KiB
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// Source: https://github.com/torvalds/linux/blob/master/arch/riscv/boot/dts/kendryte/k210.dtsi
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// SPDX-License-Identifier: GPL-2.0+
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/*
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 * Copyright (C) 2019 Sean Anderson <seanga2@gmail.com>
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 * Copyright (C) 2020 Western Digital Corporation or its affiliates.
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 */
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/*
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#define K210_CLK_PLL0   0
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#define K210_CLK_PLL1   0
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#define K210_CLK_ACLK   0
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#define K210_CLK_CPU    0
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*/
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// todo: generate clock speed in sbi binary
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/ {
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	/*
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	 * Although the K210 is a 64-bit CPU, the address bus is only 32-bits
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	 * wide, and the upper half of all addresses is ignored.
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	 */
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	#address-cells = <1>;
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	#size-cells = <1>;
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	compatible = "kendryte,k210";
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	aliases {
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		serial0 = &uarths0;
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	};
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	/*
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	 * The K210 has an sv39 MMU following the priviledge specification v1.9.
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	 * Since this is a non-ratified draft specification, the kernel does not
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	 * support it and the K210 support enabled only for the !MMU case.
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	 * Be consistent with this by setting the CPUs MMU type to "none".
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	 */
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    /* No, I want to use mmu in my application -- luojia65 */
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	cpus {
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		#address-cells = <1>;
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		#size-cells = <0>;
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		timebase-frequency = <7800000>;
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		cpu0: cpu@0 {
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			device_type = "cpu";
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			reg = <0>;
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			compatible = "kendryte,k210", "sifive,rocket0", "riscv";
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			riscv,isa = "rv64imafdc";
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			mmu-type = "none";
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			i-cache-size = <0x8000>;
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			i-cache-block-size = <64>;
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			d-cache-size = <0x8000>;
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			d-cache-block-size = <64>;
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			clocks = <&sysctl K210_CLK_CPU>;
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			clock-frequency = <390000000>;
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			cpu0_intc: interrupt-controller {
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				#interrupt-cells = <1>;
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				interrupt-controller;
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				compatible = "riscv,cpu-intc";
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			};
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		};
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		cpu1: cpu@1 {
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			device_type = "cpu";
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			reg = <1>;
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			compatible = "kendryte,k210", "sifive,rocket0", "riscv";
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			riscv,isa = "rv64imafdc";
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			mmu-type = "none";
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			i-cache-size = <0x8000>;
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			i-cache-block-size = <64>;
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			d-cache-size = <0x8000>;
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			d-cache-block-size = <64>;
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			clocks = <&sysctl K210_CLK_CPU>;
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			clock-frequency = <390000000>;
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cpu1_intc: interrupt-controller { #interrupt-cells = <1>; interrupt-controller; compatible = "riscv,cpu-intc"; }; }; }; sram: memory@80000000 { device_type = "memory"; reg = <0x80000000 0x400000>, <0x80400000 0x200000>, <0x80600000 0x200000>; reg-names = "sram0", "sram1", "aisram"; }; clocks { in0: oscillator { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <26000000>; }; }; soc { #address-cells = <1>; #size-cells = <1>; compatible = "kendryte,k210-soc", "simple-bus"; ranges; interrupt-parent = <&plic0>; sysctl: sysctl@50440000 { compatible = "kendryte,k210-sysctl", "simple-mfd"; reg = <0x50440000 0x1000>; #clock-cells = <1>; }; clint0: interrupt-controller@2000000 { compatible = "riscv,clint0"; reg = <0x2000000 0xC000>; interrupts-extended = <&cpu0_intc 3>, <&cpu1_intc 3>; clocks = <&sysctl K210_CLK_ACLK>; }; plic0: interrupt-controller@c000000 { #interrupt-cells = <1>; interrupt-controller; compatible = "kendryte,k210-plic0", "riscv,plic0"; reg = <0xC000000 0x4000000>; interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 0xffffffff>, <&cpu1_intc 11>, <&cpu1_intc 0xffffffff>; riscv,ndev = <65>; riscv,max-priority = <7>; }; uarths0: serial@38000000 { compatible = "kendryte,k210-uarths", "sifive,uart0"; reg = <0x38000000 0x1000>; interrupts = <33>; clocks = <&sysctl K210_CLK_CPU>; }; // todo: other peripherals -- luojia65 }; };