- 12 Jul, 2022 1 commit
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陈林峰 authored
Re-modified the address mapping space. This enables the kernel to manage the virtual memory space as if it were directly managing physical memory, and the kernel does not need to perform address translation.
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- 11 Jul, 2022 1 commit
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陈林峰 authored
Because the hardware characteristics of loongarch are quite different from those of riscv, the changes in this chapter are relatively large, and because the behavior of privileged instructions is difficult to debug, although the basic work has been completed, it still cannot work normally.
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- 07 Jul, 2022 1 commit
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陈林峰 authored
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- 04 Jul, 2022 1 commit
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陈林峰 authored
Since the loongArch platform requires software to manage TLB, and its platform difference is quite different from RISC-V, it needs to reorganize the page table and TLB processing
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- 05 Jun, 2022 1 commit
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陈林峰 authored
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- 20 May, 2022 1 commit
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陈林峰 authored
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- 16 May, 2022 1 commit
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陈林峰 authored
Add loonArch register support, solve ABI call error problem. Complete batch system.
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- 15 May, 2022 2 commits
- 09 May, 2022 1 commit
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陈林峰 authored
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- 08 May, 2022 1 commit
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陈林峰 authored
add uart support
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- 05 May, 2022 1 commit
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陈林峰 authored
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