In AVRFrameLowering::spillCalleeSavedRegisters(), when a 16-bit
livein register is spilled, two PUSH instructions are generated
for the higher and lower 8-bit registers. But these two 8-bit
registers are marked as killed in the two PUSH instructions, so
any future use of them will cause a crash.

This patch fixes the above issue by adding the two sub 8-bit
registers to the livein list.

Fixes https://github.com/llvm/llvm-project/issues/56423

Reviewed By: jacquesguan

Differential Revision: https://reviews.llvm.org/D144720

These are part of the optimization pipeline, of which the legacy pass manager version is deprecated and being removed.

`emitPrologue` may insert stack pointer adjustment in tail call optimized functions where the callee argument stack size is bigger than the caller's. In such a case, the adjustment must be taken into account when generating CFA directives.

Reviewed By: pengfei

Differential Revision: https://reviews.llvm.org/D143618

LLVM_DUMP_METHOD includes ATTRIBUTE_NOINLINE. operator<< isn't
what we normally consider a dump method so it should be ok to inline.

This fixes a warning from gcc that some other declaration for some
other class was inline but this one is noinline. Seems like a bogus
warning from gcc really.

isSizelessBuiltinType includes RISC-V vector and WebAssembly reference
types. This code is not applicable to those types.

The old code didn't actually align the values, and it added padding even
when none was necessary. This approach will pad entries if necessary
and, similar to the struct case, use the host pointer as guidance.

NOTE: This does still not align them as the host has, but it's unclear
      if the user really should use the alignment bits anyway. For now
      this is a reasonable compromise, only if we have host alignment
      information (explicitly not implicitly via the host pointer), we
      could do it completely right without wasting lots of resources for
      >99% of the cases.

Fixes: https://github.com/llvm/llvm-project/issues/61034

- Make `IterOfRange` and `ValueOfRange` work with types that require
  custom `begin`/`end` functions.
- Allow for `adl_begin`/`adl_end` to be used in constant-evaluated
  contexts.
- Use SFINAE-friendly trailing return type deductions `adl_begin`/`adl_end` so that they are useable in template argument deduction.
- Add missing documentation comments.

This is required for future work in https://reviews.llvm.org/D144503.

Reviewed By: dblaikie, zero9178

Differential Revision: https://reviews.llvm.org/D144583

Update function bodies to forward forwarding references.
I spotted this while authoring a clang-tidy tool for CppCoreGuideline F.19

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D143877

Such a type is never going to have a ctor home, and may be used for type
punning or other ways of creating objects.

May be a more generally acceptable solution in some cases compared to
attributing with [[clang::standalone_debug]].

Differential Revision: https://reviews.llvm.org/D144931

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D144442

There are a variety of cases where we want more control over the exact
instruction emitted. This commit creates a new pass to fixup
instructions after the DAG has been lowered. The pass is only meant to
replace instructions that are guranteed to be interchangable, not to
do analysis for special cases.

Handling these instruction changes in in X86ISelLowering of
X86ISelDAGToDAG isn't ideal, as its liable to either break existing
patterns that expected a certain instruction or generate infinite
loops.

As well, operating as the MachineInstruction level allows us to access
scheduling/code size information for making the decisions.

Currently only implements `{v}permilps` -> `{v}shufps/{v}shufd` but
more transforms can be added.

Differential Revision: https://reviews.llvm.org/D143787

Differential Revision: https://reviews.llvm.org/D144779

Atom
    - No domain switching penalties
Nehalem+
    - No penalty on moves
Haswell+
    - No penalty on moves / shuffles
Skylake+
    - No penality on moves / shuffles / blends

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D143859

When a caller that does not use TOC calls a function, a call stub is needed if
the function may use TOC. --no-power10-stubs avoids PC-relative instructions in
the code sequence.

The --no-power10-stubs=no implementation added in D94627 is wrong.
First, the first instruction incorrectly uses `mflr 0` (instead of `mflr 12`).
Second, for the PLT case, it uses addis+addi with getVA instead of addis+ld with
getGotPltVA.

Reviewed By: #bolt, maksfb

Differential Revision: https://reviews.llvm.org/D144758

Expose log for testing purposes.

Reviewed By: #bolt, maksfb

Differential Revision: https://reviews.llvm.org/D144674

In case of a function with unknown control flow but with a single jump
table and a single jump table site, we attempt to match the jump table
and a site and update block successors using jump table targets.
Restrict this behavior for split jump tables which have targets in a
fragment function.

Fixes https://github.com/llvm/llvm-project/issues/60795.

Reviewed By: #bolt, rafauler

Differential Revision: https://reviews.llvm.org/D144602

Avoid modifying `BF`, instead set extra output parameter and modify BF in caller
scope.

Reviewed By: #bolt, rafauler

Differential Revision: https://reviews.llvm.org/D144598

ICF optimization runs multiple passes and the order in which functions
are folded could be dependent on the order they are being processed.
This order is indeterministic as functions are intermediately stored in
std::unordered_map<>. Note that this order is mostly stable, but is not
guaranteed to be and can change e.g. after switching to a different C++
library implementation.

Because the processing (and folding) order is indeterministic, the
previous way of calculating merged function call count could produce
different results.

Change the way we calculate the ICF call count to make it independent of
the function folding/processing order.

Mostly NFC as the output binary should remain the same, the change
affects only the console output.

Reviewed By: yota9

Differential Revision: https://reviews.llvm.org/D144807

The ValueRange printing behaviour of `OpAsmPrinter` and `AsmPrinter` is different, as reported [[ https://github.com/llvm/llvm-project/issues/59334 | here ]]

```
static void testPrint(AsmPrinter &p, Operation *op, ValueRange operands) {
  p << '(' << operands << ')';
}
```
Although the base `AsmPrinter` is passed as the first parameter (and not `OpAsmPrinter`), the code compiles fine. However, instead of the SSA values, the types for the operands will be printed. This is a violation of the Liskov Substitution Principle.
The desired behaviour would be that the above code does not compile. The reason it compiles, is that for the above code, the `TypeRange` version will be selected for the `<<` operator, since `ValueRange` is implicitly converted to `TypeRange`:
```
template <typename AsmPrinterT>
inline std::enable_if_t<std::is_base_of<AsmPrinter, AsmPrinterT>::value,
                        AsmPrinterT &>
operator<<(AsmPrinterT &p, const TypeRange &types)...

Legalize G_SHUFFLE_VECTOR having destination vector length smaller than
source vector length by reshaping destination vector.

Differential Revision: https://reviews.llvm.org/D144670

PPC64PCRelPLTStub (from D83669) duplicates lot of code from
PPC64R12SetupStub. Just merge them.

Note: PPC64R12SetupStub does not correctly handle long branch to a
non-preemptible non-TOC code.

When adding a undefined symbols to the symbol table, if the existing
reference is weak replace the symbol flags with (potentially) non-weak
binding.

Fixes: https://github.com/llvm/llvm-project/issues/60829

Differential Revision: https://reviews.llvm.org/D144747

To make the map lookups simpler for opaque pointers and to simplify future typed pointer code removal. No significant compile time wins though.

While we're here, remove the address space 0 optimization for typed pointers.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D144910

When createInstrumentedIndirectCall() was invoked for tail calls, we
attached annotation instruction twice to the new call instruction.
First in createDirectCall(), and then again while copying over the
metadata operands.

As a result, the annotations were not properly stripped for such calls
before the call to freeAnnotations() in LowerAnnotations pass. That lead
to use-after-free while restoring the offsets with setOffset() call.

Reviewed By: yota9

Differential Revision: https://reviews.llvm.org/D144806

Adding this prefix will indicate clearly that the compiler doesn't exit
when it hits this diagnostic. Searches for other non-fatal diagnostics
will also be able to find this diagnostic easily.

`is_placeholder`, despite having an "is_" name, actually returns an int:
1 for `_1`, 2 for `_2`, 3 for `_3`, and so on. But it should still be int,
not size_t.

Noticed when reviewing D143786, we are currently inheriting the x86-64-v* tuning flags from specific CPUs when really we need these to be a mixture of common traits and tuning to avoid specific severe regressions.

Differential Revision: https://reviews.llvm.org/D144832

The string to integer and string to float standalone fuzz targets just
ran the functions and didn't do anything with the output. This was
intentional, since they are intended to be used with sanitizers to
detect buffer overflow bugs. Not using the variables was causing compile
warnings, so this patch adds trivial checks to use the variables.

Reviewed By: sivachandra, lntue

Differential Revision: https://reviews.llvm.org/D144208

This reverts commit 0a0b6fa4.

Since typed pointers are deprecated.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D144901

This patch fixes:

  llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp:582:17: error:
  unused variable 'INSvilaneMI' [-Werror,-Wunused-variable]

This patch adds support for TargetExtType/target(...) representing
SPIR-V builtin types. After D135202, target(...) is the preferred way
for representing SPIR-V builtin types in LLVM IR and the only working
in the opaque pointer mode.

In order to maintain compatibility with LLVM IR generated by older
versions of Clang and LLVM/SPIR-V Translator, pointers-to-opaque-structs
denoting SPIR-V/OpenCL builtin types will be translated to equivalent
SPIR-V target extension types. This translation is only available in the
typed pointer mode (-opaque-pointers=0).

The relevant LIT tests with SPIR-V builtins were converted to use the
new target(...) notation.

Differential Revision: https://reviews.llvm.org/D144494

Crash caused by: 708eb1b9

Differential Revision: https://reviews.llvm.org/D144895

[AArch64] Avoid using intermediate integer registers for copying between source and destination floating point registers

In post-isel code, there are cases where there were redundant copies from a source FPR to an intermediate GPR in order to copy to a destination FPR. In this patch, we identify these patterns in post-isel peephole optimization and replace them with a direct FPR-to-FPR copy.
One example for this will be the insertion of the scalar result of 'uaddlv' neon intrinsic function into a destination vector. During instruction selection phase, 'uaddlv' result is copied to a GPR, & a vector insert instruction is matched separately to copy the previous result to a destination SIMD&FP register.

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D142594

For AVR, the definition of USHRT_MAX overflows.

Reviewed By: aaron.ballman, #clang-language-wg

Differential Revision: https://reviews.llvm.org/D144218

Handle the case where the diff is a pure removal of lines. Before this
change start_line would end up as 0 which is rejected by clang-format.

Submitting on behalf of @tamird.

Differential Revision: https://reviews.llvm.org/D144291