- exception.rs: full assembly save/restore trampolines (~150 insns)
  saves all GPRs + sysregs → VcpuContext → Rust handler → restore → eret
- vm.rs: fixed stage2_map_block pmd_pa bug (was using stale L1 entry)
  added stage2_walk() for IPA→PA translation
  added TLB invalidation after every Stage-2 mapping change
  exposed get_active_pgd() and stage2_map_page() for demand paging
- main.rs: real enter_guest assembly (loads EL1 sysregs + GPRs + eret)
  removed prototype simulation code
- crash.rs: real snapshot_guest_memory via Stage-2 walk
  exposed CRASH_REPORTS static for dump.rs
- dump.rs: reads CRASH_REPORTS via crate path (no extern Rust hack)
- exception.rs: added SVC handler, connected demand paging to
  vm::stage2_map_page + TLB invalidate
- guest/test_guest.c: installs VBAR_EL1, better crash markers
- updated README and docs